
	opt at-
	opt m-
	opt c+

	SECTION .text
	
	xdef transformVertexList_NoDepth

	cnop 0,4
transformVertexList_NoDepth
	; args are VERT *, long numverts, long *transverts

	sll		a1,a1,2		; multiply by four
	addu	a1,a2

	lw		t0,(a0)		; load xy
	lw		t1,4(a0)	; load z
	lw		t2,8(a0)	; load xy
	lw		t3,12(a0)	; load z
	lw		t4,16(a0)	; load xy
	lw		t5,20(a0)	; load z

@transVertexLoop
	mtc2	t0, r0		; load gte registers
	mtc2	t1, r1	
	mtc2	t2, r2	
	mtc2	t3, r3	
	mtc2	t4, r4	
	mtc2	t5, r5

	lw		t0,24(a0)	; load xy (using delay slots)	
	lw		t1,28(a0)	; load z

	RTPT				; equiv. gte_rtpt_b

	lw		t2,32(a0)
	lw		t3,36(a0)	
	lw		t4,40(a0)	
	lw		t5,44(a0)


	swc2	r12,(a2)	; store screen verts
	swc2	r13,4(a2)
	swc2	r14,8(a2)

	addu	a2,12

	slt		at,a2,a1
	bne		at,zero,@transVertexLoop
	addu	a0,24		; he he! branch slot not going to waste here :)

	j	ra
	nop







; Direct Copy of transformVertexListA while I remove psi.c from the scheme of things

	opt at-
	opt m-
	opt c+

	SECTION .text
	
	xdef transformVertexListA_ChickenRun

	cnop 0,4
transformVertexListA_ChickenRun
	; args are VERT *, long numverts, long *transverts, long *transdepths

	sll		a1,a1,2		; multiply by four
	addu	a1,a3

	lw		t0,(a0)		; load xy
	lw		t1,4(a0)	; load z
	lw		t2,8(a0)	; load xy
	lw		t3,12(a0)	; load z
	lw		t4,16(a0)	; load xy
	lw		t5,20(a0)	; load z

@transVertexLoop
	mtc2	t0, r0		; load gte registers
	mtc2	t1, r1	
	mtc2	t2, r2	
	mtc2	t3, r3	
	mtc2	t4, r4	
	mtc2	t5, r5

	lw		t0,24(a0)	; load xy (using delay slots)	
	lw		t1,28(a0)	; load z

	RTPT				; equiv. gte_rtpt_b

	lw		t2,32(a0)
	lw		t3,36(a0)	
	lw		t4,40(a0)	
	lw		t5,44(a0)


	swc2	r12,(a2)	; store screen verts
	swc2	r13,4(a2)
	swc2	r14,8(a2)

	swc2	r17,(a3)	; store screen depths
	swc2	r18,4(a3)
	swc2	r19,8(a3)

	addu	a2,12
	addu	a3,12

	slt		at,a3,a1
	bne		at,zero,@transVertexLoop
	addu	a0,24		; he he! branch slot not going to waste here :)

	j	ra
	nop



; A brand new alternative version of transvertex
; hmmm. we need a register = ffff0000, coz it's being macro-ised
;	opt at-
	opt at+
;	opt m-
	opt m+
	opt c+


;inputs
; vert *
; numverts
; transverts out
; transdepths out
; model-cam x
; model-cam y
; model-cam z

	SECTION .text
	
; what we need to add in is (model coord - camera coord)
; assume that the "out of 32768 range of the camera" test has already been done

	xdef transformVertexListA_ZeroCam

	cnop 0,4
transformVertexListA_ZeroCam
	; args were VERT *, long numverts, long *transverts, long *transdepths

	lw	a1,4(a0)	;numverts
	lw	a2,8(a0)	;transverts
	lw	a3,12(a0)	;transdepths

	lw	t6,16(a0)	;model-cam x
	lw	t7,20(a0)	;model-cam y
	lw	t8,24(a0)	;model-cam z
	sll		t7,t7,16	; shift y up

	lw	a0,0(a0)	;src vert *


	sll		a1,a1,2		; multiply by four
	addu	a1,a3

	lw		t0,(a0)		; load xy
	lw		t1,4(a0)	; load z
	add		t9,t0, t6
	and		t9,t9,0xffff
	and		t0,t0,0xffff0000
	addu		t0,t0,t7
	or		t0,t0,t9
	addu		t1,t1,t8


	lw		t2,8(a0)	; load xy
	lw		t3,12(a0)	; load z
	add		t9,t2, t6
	and		t9,t9,0xffff
	and		t2,t2,0xffff0000
	addu		t2,t2,t7
	or		t2,t2,t9
	addu		t3,t3,t8

	lw		t4,16(a0)	; load xy
	lw		t5,20(a0)	; load z
	add		t9,t4, t6
	and		t9,t9,0xffff
	and		t4,t4,0xffff0000
	addu		t4,t4,t7
	or		t4,t4,t9
	addu		t5,t5,t8


@transVertexLoop
	mtc2	t0, r0		; load gte registers
	mtc2	t1, r1	
	mtc2	t2, r2	
	mtc2	t3, r3	
	mtc2	t4, r4	
	mtc2	t5, r5

	lw		t0,24(a0)	; load xy (using delay slots)	
	lw		t1,28(a0)	; load z

; let's say t6 = x,t7 =y<<16,t8=z are the additional xyz's
; and t9 is a temp

	add		t9,t0, t6
	and		t9,t9,0xffff
	and		t0,t0,0xffff0000
	addu		t0,t0,t7
	or		t0,t0,t9
	addu		t1,t1,t8
	
	RTPT				; equiv. gte_rtpt_b

	lw		t2,32(a0)
	lw		t3,36(a0)
		
	add		t9,t2, t6
	and		t9,t9,0xffff
	and		t2,t2,0xffff0000
	addu		t2,t2,t7
	or		t2,t2,t9
	addu		t3,t3,t8

	lw		t4,40(a0)	
	lw		t5,44(a0)

	add		t9,t4, t6
	and		t9,t9,0xffff
	and		t4,t4,0xffff0000
	addu		t4,t4,t7
	or		t4,t4,t9
	addu		t5,t5,t8

	swc2	r12,(a2)	; store screen verts
	swc2	r13,4(a2)
	swc2	r14,8(a2)

	swc2	r17,(a3)	; store screen depths
	swc2	r18,4(a3)
	swc2	r19,8(a3)

	addu	a2,12
	addu	a3,12

	opt at-

	slt		at,a3,a1
	bne		at,zero,@transVertexLoop
	addu	a0,24		; he he! branch slot not going to waste here :)

	j	ra
	nop

