I read somewhere that the PlayStation's CPU, the R3000 was similar to the Nintendo 64's CPU. Apparently, the N64 had a R4000 that was clocked higher (hence, more heat). Is this true? From Wikipedia... The Nintendo 64's central processing unit (CPU) is the NEC VR4300. A cost-reduced derivative of the 64-bit MIPS Technologies R4300i. Built by NEC on a 0.35 µm process, the VR4300 is a RISC 5-stage scalar in-order execution processor, with integrated floating point unit, internal 24 KB direct-mapped L1 cache (16KB for instructions, 8KB for data). The 4.6 million transistors CPU is cooled passively by an aluminum heatspreader that makes contact with a steel heat sink above. The PlayStaton has, MIPS R3000A-compatible 32-bit RISC chip running at 33.8688 MHz The chip is manufactured by LSI Logic Corp. with technology licensed from SGI. Features an operating performance of 30 MIPS, Bus bandwidth of 132 MB/s and a 4 kB Instruction Cache.
Yes, they're from same family/architecture of processors. Similar instruction set but different size of registers, etc.
That's correct. The PSX, PS2, N64 and PSP all use MIPS family processors. N64 is 64bit, whereas the PSP and PSX are 32 bit (I don't remember which the PS2 is). The MIPS instruction set is mostly the same for all of them, minus extensions (all of them have vector processor(s) that are all interfaced differently. The N64 has 64bit code extensions).
haha, it is... The PS2 has a R5900? I have only been focusing on the PS1 at this point. One thing at a time...
PSP uses an 32 bit version of the R4000. It's a dual core (Yes, DUAL CORE) customized CPU based on R4000 (Again, there's two R4000 cores on the same die) called "Alegrex". The secondary core is mainly used to decompress MPEG4 and ATRAC contents. :thumbsup:
Only partially correct. All GPRs are 128 bit, but most instructions (including all standard MIPS ones) only access the lower 64. Vector instructions do use 128, though.
Not quite, it's based on the R3K which is NOT the same as the R3000. It's like the update to the 32 bit platform. The MediaEngine CPU core is the same as the primary CPU, but lacking the math coprocessors. The cores don't have any cache coherency - the programmer has to handle that by hand. The primary difference between the MIPS R3K and the Allegrex is the existence of special opcodes, like bit reversing, bit field ops, byte swapping, counting set/clr bits, and a few other things.
