Sega Genesis Model 1 Revision VA6 overclock questions. What to do and what do I need?

Hello everyone. I'm thinking of overclocking my Sega Genesis Model 1 Revision VA6 (no HD model with excellent sound). The CPU is the Hitachi version. I heard that this is the best one for overclocking and the most stable one when overclocked. Is the Motorola version of the mod the same for the Hitachi chip or is it different? I also heard that the Hitachi chip is rare in North American Genesis consoles.

I want a speed that allows games to run properly but without slowdown or frame drops i.e. losing 50+ rings in Sonic 1 causing the game to slow down for a bit. I heard that 10MHz gives the results I want. No slowdown and games running like normal.

I also want a switch between the original clock speed and the faster clock speed. I heard that the Sega CD and Sega 32X don't work when in overclocked mode. As I have both of those, a switch would be nice. Can the 32X still be used for Genesis pass-through when the Genesis is in overclocked mode? I use RGB SCART cables and I only have a Genesis Model 2 SCART cable. Will this mod mean I have to get a Model 1 RGB SCART cable?

What parts do I need? Any help would be highly appreciated!

 

(BUMP)

Does anyone know what I need to do? I don't want to fry something if the mod is different for my CPU.

 

You COULD just put a 68010 in it as some people have done. Other than that there's this guide which may or may not help: http://www.sega-16.com/forum/showth...ck-your-sega-genesis-model-1-and-NOTHING-ELSE

 

A 68010 won't make it run any faster.

 

How so? At the same speed, a 68010 is miles faster. It can run Sonic w/o lag.

 

Its not actually running any faster though...
I haven't actually looked in to it for the Mega Drive, but it shouldn't make any difference, unless the games are written to use the 68010...

But, hey, if it makes a difference, that's good!

 

The 68010 can cause some games not to work. I would recommend the switch setup so you can easily be in "stock mode"

 

I experienced many md va6 that don't work with 10 mhz overclock, so make a test

 

The typical reasons overclocking fails are the CPU oscillator and system oscillator not being locked in a suitable phase, and naive clock switching schemes.

Asynchronous oscillators means they will drift in and out of an appropriate phase relationship at some beat frequency, and when the CPU accesses memory at an inopportune moment, the memory cycle will load/store garbage due to metastability violations, and the CPU will (eventually) crash.

Naive clock switching (SPDT switch or standard digital multiplexer) leads to "runt pulses" since the clock may be handed off in the middle of a cycle. Runt pulses likewise violate the CPU's setup and hold times which will screw up the CPU's internal state, possibly leading to a crash.

Solution: The CPU and system should be synchronized with a phase-locked loop and the clock switching mechanism should employ a glitch-free clock multiplexer, or be built into the PLL's divider. Depending on the CPU's frequency and the how it interfaces with the rest of the system, it might be necessary to do a "dynamic" overclock to access memory using the standard access timing, or maybe align specific CPU cycles to the system clock with duty cycle modulation etc (starts getting complicated).
Note that some (typically newer) systems are designed to be tolerant of multiple asynchronous clocks, and thus have multiple canned oscillators. The Genesis to my knowledge (with a single system-wide oscillator) is not one of them.

(Overclocking is more complicated than people realize.)

 

Interestingly, the VDP has a pin (usually named SEL1, which is pin 48 on the 315-5313 chip and pin 129 on the various FC1004 ASICs version) which lets you configure the 68k clock pin as an input instead as an output as it is currently.

I don't know if it affects Z80 clock pin as well (probably not, as it is labelled as an output only in MD1 service manual, although it is listed as an i/o like 68k clock pin in MD2 service manual) but it might fixes some of the synchronization issues.

That pin is forced to GND in current scheme, it would need to be connected to Vcc when external 68k clock is used and this clock connected to VDP 68k clock input.

 

in my experience I never had problems overclockin at 10 mhz pal and jap va4 (maybe only once), but va6 usually give me audio/video shit or crash.

a strange thing is a few days ago I tried to overclock a genesis va3 unit, it get stuck with 10 mhz but works perfectly with 12 mhz....unfortunately I'm totally ignorant in theory so I can't explain these things...

I'm interested in this vdp pin 129 thing, but really can't understand it well, could you be more detailed?

thanks

 

Like I said, this pin is tied to ground by default: this makes the VDP outputs a clock to the 68k CPU by dividing input Master Clock (53 Mhz crystal oscillator) by 7.

If you modded your console for overclocking 68k CPU, you likely disconnected the 68k CLK input to connect it to your own crystal oscillator but the VDP is still using its own generated clock when communicating with the 68k CPU, generating RAM access signals, accessing the 68k bus during DMA, etc... which can potentially cause issues depending on the games.

The idea would be to change the state of the SEL1 input to tell the VDP to not generate its own 68k clock but rather use it as an input.

Theoretically,you will need to :

1) keep the connection between 68k CLK input and VDP CLK pin (pin 130 for FC1004 ASICs or pin 49 on 315-5313 chip) untouched
2) add your external crystal oscillator and connect it to 68k CLK input (using a switch to disable overclocking if wanted)
3) lift SEL1 pin (pin 129 on FC1004 ASIC or pin 48 on 315-5313 chip) and connect it to +5V when overclocking is enabled (and ground when disabled)

Off course, this is totally untested and there is no warranty that it will work better with problematic games, it's just a theory.

Check this service manual for complete pinout of 315-5313 chip (used in earlier Model 1) and FC1004 derivates (used in later models).
http://gendev.spritesmind.net/files/md/tech/Sega IC specifications A4.pdf

 

I tried with no switches with a va6 that gives me problem with overclock but feedin pin 48 to 5v (of a 315-5313a), after put 10 mhz on pin 15 of the 68k gives me black screen

 

You say that this console gives you problem with overclock.
Did you at least verified if it starts fine with original mod i.e 68k pin 15 connected to your 10 mhz clock and 315-5313 pin 48 left to GND ?

I guess the original mod also implies to disconnect 68k pin 15 from the board to replace the clock coming from 315-5313 by an external clock.
Did you restored that connection or at least connected 315-5313 pin 49 to the 10 Mhz clock as well when pin 48 was set to 5v ?
Because this is also required: you must input an external 68k clock to pin 49 when pin 48 is set to 5v.


If you did everything correctly and it still does not boot, it could mean this VDP feature simply does not work (or was removed on later revisions since it was not used) or the VDP does not support the external clock you are feeding him.

 

I'm very noob in understand theory, sorry....

Ye, when I feed 10 mhz to 68k leaving pin 48 of 315-5313 to ground, mega drive boots up, it gives shitty sounds or crash after few minutes.

I did everything right but ignored pin 49 of 315-5313...

have I to feed 10 mhz to pin 49?

and what to feed to pin 15 of 68k?

 

Normally, pin 15 of 68k is feeded by pin 49 of 315-5313 through the pcb traces because the 68k clock is generated internally by 315-5313 chip.

When you feed your own external clock into pin 15 of 68k for overclocking, I think you are supposed to lift pin 15 from the board to remove the connection with the normal clock and avoid that the 10 mhz clock interferes with it and other part of the console.

Now, when pin 48 of 315-5313 is connected to 5V, pin 49 is now supposed to be an input for 315-5313, the 68k clock is not generated internally anymore and you need to feed your external clock into pin 49.

Is that clearer ?

Well, now that I think about it, it probably won't work because the original clock is also used for the FM sound chip clock and that chip probably does not work with a 10 MHz clock.

Anyway, if you don't really understand these things, I wouldn't mess with it of I were you, this was just a theory after all.

 

don't worry about that, I'm a totally noob in theory but pretty good at solderin, moddin, liftin pins and all that shit, plus I really like to try new things with MDs

I will try for sure feedin pin 49, only to see what happens