Saturn CD drive pinouts

Discussion in 'Sega Saturn Programming and Development' started by TriMesh, Apr 18, 2014.

  1. TriMesh

    TriMesh Site Supporter 2013-2017

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    I was thinking it might be worthwhile to collect all the information we have in a single place.

    I'll start with a corrected version of the data for the EXL-P608 drive I posted earlier.

    Main board: '171-7288B PC BD SATURN MAIN VA11", "837-12648-01 IC BD SATURN MAIN VA11 JPN"
    Drive: ""610-6294-20 ASSY CD UNIT SAT JVC EXL-P608"
    Drive PCB: "HQ100002-002", "HQA-001A"

    CN101: Connected to optical pickup presumably common for all Optima-6 based drives.
    1: Pickup 'A'. Connects to AN8809 RF Amp pin 36.
    2: Pickup 'B'.
    Connects to AN8809 RF Amp pin 35.
    3: Pickup 'F'
    . Connects to AN8809 RF Amp pin 34.
    4: Pickup 'C'. Commoned with 'A'
    5: Pickup 'D'
    . Commoned with 'B'
    6: Photodiode common. Connected to VCC on drive board
    7: Pickup 'E'
    . Connects to AN8809 RF Amp pin 33.
    8: Monitor diode. Connects to AN8809 RF Amp pin 1.
    9: Laser diode drive. Driven (via transistor ampliifer) from AN8809 RF Amp chip pin 2.
    10: Bottom end of laser adjust pot. Connected to ground on drive board via fixed R.
    11: Laser/monitor diode + chassis ground. Connected to ground on drive board.
    12: Focus actuator +VE. Connected to M56754SP BTL driver pin 11.
    13: Tracking actuator +VE. Connected to M56754SP BTL driver pin 7.
    14: Tracking actuator -VE. Connected to M56754SP BTL driver pin 6.
    15: Focus actuator -VE. Connected to M56754SP BTL driver pin 12.

    CN102: Host interface
    1: 33MHz clock - sourced from Saturn, drives pin 58 on MM662724 DSP chip via coupling cap.
    2: GND
    3: Drive status info. Pin 3 of CDM301V sub-cpu
    4: Drive commands. Pin 4 of CDM301V sub-cpu
    5: Command / status byte sync line. Pulses for each byte. Pin 1 of CDM301V sub-CPU.
    6: Command / status frame signal - locked to CD frame rate in playback, 60Hz in idle. Pin 5 of CDM301V
    7: Command / status clock. Bit clock for both command and status. Pin 2 of CDM301V sub-CPU
    8: GND - on JVC drives. Used by main board to select frequency on pin 1 (GND=33MHz, open=16MHz)
    9: BCLK - commoned with pin 14
    10: BLKCLK from DSP pin 13 - pulses high at the start of each subcode block (I.E. 75Hz in x1 mode)
    11: /RESET from Saturn - wired to sub-CPU pin 18.
    12: GND
    13: LRCLK - From pin 2 of DSP. Standard I2S signal.
    14: BCLK - From pin 1 of DSP. Standard I2S signal (commoned to 9)
    15: DATA - From pin 3 of DSP (used for both CD-ROM and digital audio)
    16: GND
    17: /CD-ROM signal, high with audio. From pin 25 of sub-CPU
    18: SUBC from DSP pin 55. Just described as "subcode out"
    19: SBCK from DSP pin 56. Clock for 19.
    20: IPFLG from DSP pin 64. Pulses high on C2 error.
    21: /CLDCLK from DSP pin 62. Subcode frame clock (clock for IPFLG)

    CN103: Drive power
    1: +5V for output stages of BTL driver - wired to pins 29 and 30 of the BTL chip
    2: Gnd for 1 - wired to BTL driver ground pins
    3: Gnd for rest of board
    4: +5V for rest of board - also runs logic supply on BTL chip.
    5: Door sw - low when drive door closed. Pulled up on drive PCB, wires to pin 30 on sub-CPU.

    If anyone else can cross check-this, that would be good.
     
  2. Druidic teacher

    Druidic teacher Officer at Arms

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    Last edited: Jun 22, 2017
  3. Helder

    Helder Site Supporter 2014,2015

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    This information should be stickyed on this sub-forum.
     
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