Looking for 4 testers for SuperCIC/IGR/1chip mod

Damn, saw this too late. Would've loved to be a tester!

 

If you do happen to make any revisions you need tested I would be happy to help, but good luck anyway

 

There is already another revision in the pipeline. Also change of supplier with min order of 10, so will be more for next round of testing.

 

v2 with fixes from tester + uigr support






Will contact testers when boards arrive.

 

Those boards look awesome. Love the purple pcb, too. Looks very high end.

 

New ones won't be purple, render of board isn't from same place I've ordered from.

New ones will be a different (not green or black) colour.

 

Nice
I just have one thing to note: the region timeout (set console 9s in region of the cartridge on powering on) is managed by the uIGR! This makes the region timeout by the SuperCIC useless (but it is not a problem if it is enabled because the duration of the region timeout is almost the same length - the user won't recognize)
I added some hex-Files for the uIGR, where the region timeout is enabled by default: URL to my GitHub
If you use the Hex-File with region timeout disabled your testers might get "This gamepak is not designed for your SNES/SFC" on the very first start up (depending on the game) as the uIGR starts in 60Hz the first time (not the SuperCIC 60Hz mode).

So, some suggestions for version 2.1:
- connect SuperCIC pin 4 to GND instead of Vcc
- give a break out for uIGR pin 7 (region patch enable/disbale), because someone might want to install a region patch too (for example this design here; not compatible to SNES Mini/Jr. for any reason the designer don't know)

 

Region patch will be added in next version anyway.

I just didn't find a lot of info of what is required before I decided to do another revision.

Do you have more details of the region patch?

And thanks for the files, that's how I expected it to work based on igr and supercic.

 

Cool stuff @Bad_Ad84 . Im obviously useless at modding things like this, but I love to see these things being made.

 

Sure - here you are

Basics:
The SNES has a region flag which is bit #4 in register $213f. This bit changes according to the output mode set with the SuperCIC/uIGR (60Hz = '0', 50Hz = '1').
Some games never check this flag, others check this flag at the start up. This is why there is the region timeout implemented: to set the console in a mode as expected by the game.
E.g. if you start your console in 60Hz (no region timeout) with Terranigma (PAL version) you will see the message: "This gamepak is not designed for your Super NES" (or something like that).
However: there are some games, e.g. Demons Crest or Super Street Fighter Alpha 2, who are checking the region from time to time between levels or fights! Without a region patch you don't have the chance to play the PAL version in 60Hz or the NTSC version in 50Hz.

The region patch:
The SuperCIC-lock detects the region of the cartridge using the CIC-key. The detected region is outputted at SuperCIC pin #3. This can be used to override the bit #4 at the data bus if $213f is read by the CPU. To override the bit properly, you have to use multiple gates (at least two) of a tri-state buffer (e.g. a 74HC125 or 74HCT125). Personally I use four in parallel because the 74HC125 has four buffers.

As there are some devices which have there own region patch or where the SuperCIC-lock can not know the region of the ROM: e.g. Flashcards or Self-Made carts with SNESCIC-key / SuperCIC-key.
There it might happen that the detected region does not match the ROM region. Also the sd2snes has it's own region patch algorithm implemented. Hence, I included a active/inactive bit in the uIGR.

Spoiler

Since sd2snes FW v0.1.7 preview 4 one can deactivate the sd2snes' region patch and set the SuperCIC-lock into the 'Pairmode' in the sd2snes/config.yml file. With 'Pairmode' enabled, the sd2snes updates the SuperCIC-lock with the region of the loaded ROM.

The implementation:
There are three implementations for the region patch using the SuperCIC-lock. The common idea is to detect the $213f reading at address bus B and then override the bit #4 at the databus accordingly. Luckely, all needed signals can be got from the cartridge or extension port Here are the parts you need.

• Option 1: 74*04 (Hex Inverter), 74*133 (13-NAND, might be hard to find), 74HC125/74HCT125 (four tri-state buffer)
  (initial implementation by Ikari_01; there is a mistake because the schematic just use a single tri-state buffer, but you have to use at least two in parallel.)
  
• Option 2: 74*27 (triple 3-NOR), 74*30 (8-NAND), 74HC125/74HCT125 (four tri-state buffer)
  (My current implementation: I introduced this design because the SMD package of the 74*133 was very hard to find)
• Option 3: GAL G16V8
  (Implementation by Niluje . The GAL can be programmed using the Tl866)

In option #1 and #2 I use the uIGR pin 7 as a dedicated input to the NAND gate for switching on and off the region patch. In option #3 pin 15 of the GAL has to be connected to the uIGR pin 7.

If you have any questions, just ask I can also review the schematic if you want to!

Best!

 

Do you have a schematic for option 2?

 

File attached

 

Thanks,

I think I will do this as an extra PCB, because my current PCB is under 5cmx5cm. If I go larger, it starts increasing the price. I will add some pads for v2.1

 

Interesting, nobody has looked at the 74HC688 for detecting the read access with just a single chip?

 

Would be option #4 But with this single chip you don't have the option to switch on and off the region patch.
You have to combine either:
- combine /PARD with uIGR pin7 with a single OR-gate (e.g. 74HC1G32) and connect the output to pin 1 of the 74HC688, or
- combine the output of the 74HC688 (pin 19) with uIGR pin 7 with a single OR-gate and connect the output to the tri-state buffers
In both options the logic of uIGR pin 7 is then inverted.

Good idea. Especially with the DIP components, I would prefere this solution, too

 

I got the V1 board you sent me today. I attempted to install it in a SNES Mini (NTSC). I'd love to confirm that it works, but I make a rookie mistake installing it instead. Just as I was going to put the board back into the bottom case to test it out, I put too much pressure on the CPU pin lift and broke the pin off. I should have glued it as soon as I had a wire soldered to the pin, but I thought I better wait until I had tested it. I have a spare CPU chip from another 1CHIP SNES that I think probably works, but reworking 160 pins without a hot air station is more than I have in me tonight. I will give it another try next week when I get more Chipquik or possibly another SNES mini to put it in.

I do have the following thoughts from my experience with the V1 board you sent me thus far though:

• There should be a ground next to the LED pins on the mod board -- but I see you already made that change in V2...please keep it.
• The silkscreen for "CIC 11" is cut off by a via -- again, probably not a problem on V2, but just thought I'd point it out.
• When the definitive guide gets written up for this mod, I'd suggest soldering to the vias for the CIC rather than the chip itself. Its really hard to get two wires to stick to those pins without bridging. Every pin has an accessible via except CIC pin 7 (if I recall correctly), which has it's via under the CIC itself. Also, solid hookup wire seems pretty much required here. Any reason not to use really thin wrapping wire for these connections?
• Do you have a recommended location for tapping 5v and ground? I was thinking of just using pin 1 and pin 7 from the controller port. If that's going to be the recommended install point, maybe the mod board should just have these points labeled pin 1 and pin 7 and put them next to the other controller pins for a cleaner install.

Additionally, I have the following comment about the discussion of V2: If you want to add the region patching circuit, but don't want to exceed 5cmx5cm, maybe consider a daughterboard design. There seems to be enough space in the SNES mini that you could solder bridge two boards together...the main board for just uIGR and Super CIC, the daughterboard if you need region patching as well. I have to assume that some people don't really care about region patching because all they are using is a SD2SNES (and the SD2SNES automatically patches ROMs in this way, correct?). SD2SNES users are primarily installing this for IGR and 50/60hz switching. By making two boards that are separate but matching, the end user can decide if they need the region patching or not.

 

Most of the cic connections are actually on the cart slot.

Region patching is going to be a separate board - this was mentioned above already.

The rest of the changes were already done.

For your CPU pin, just Dremel the chip and expose the connection that way

 

Hi;

The Patch D4 on ATF16V8B (GAL) working no prob on SNES US Mini and SFC Jr :

 

Sorry :/ Then I had it wwrongly in my mind! I've corrected my post

 

V1 Board delivered and installed and tested.
SuperCIC works exactly how it should, all modes and any cartridge work great. Colours look great via composite in both 60 and 50hz.
IGR all worked except setting supercic to auto mode L+R+Select+B does nothing. however V2 has UIGR so this is likely rectified.

The concerns i have are the same as tristate294, and good to see they have all be addressed with V2.

In the next day or two i plan on installing this board into a PAL 1chip-01, and taking a series of photos to hopefully create a simple to follow install guide. which may or may not be relevant for v2 of this board, perhaps the photos prior to connecting to the mod board might be useful.

I am really looking forward to the final product, the thought of having a board where i can just pop the components in is really appealing. one of the time consuming parts of a 1chip supercic is creating the mod board.

@TriState294
Not sure if this is relevant for the mini, but i grab 5v and G from the controller port connectors on the motherboard. also there is a convenient gap where the cables can run off and to the mod board. Also can grab controller port pins 2,3,4 from there. not saying its the best way, just seems to be the most convenient and can keep cables close together. attached is a photo i did of supercic from about a year ago, recently i have been using this board to test 50hz colour corrections.